This paper presents the linear regression based power estimation technique uses the input patterns with the predefined characteristics. These patterns help to analyze the power consumption of the different intellectual-property (IP) cores in digital electronic systems. Our technique can accurately deals with combinational as well as sequential logic circuits at register-transfer level (RTL). Genetic algorithm (GA) is used for the generation of sequences with the statistical characteristics. During the power analysis procedure, the Monte Carlo simulation is performed and model function is extracted with the help of LookUp-Table (LUT) approach. This function uses IPs primary inputs values for the analysis of power consumption. Our model demonstrates accurate and fast power estimation for IP-based digital system.