Abstract
Advanced Encryption Standard (AES), is known as most secured encryption standard now a days. Many researchers have implemented it in different languages like java, C and C++ with different algorithms. Recently the AES 128-bit has been implemented using Verilog on FPGA with equipped key being encrypted along with data input in whole process. In this paper the AES 128-bit encryption and decryption process with key which is only used for data input and is not encrypted throughout the encryption/decryption process. Results are same but our algorithm is slightly faster because only data is encrypted in the process of encryption, thus process time and area is optimized.
Keyword(s)
Cryptography, Plaintext, Cipher Text, Decryption, Special Key, Encryption